Arm64: Simplify TryEncodeBitMask and use for constants (#4328)
* Arm64: Simplify TryEncodeBitMask * CodeGenerator: Use TryEncodeBitMask in GenerateConstantCopy * Ptc: Bump version
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5 changed files with 81 additions and 107 deletions
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@ -16,4 +16,10 @@
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</ContentWithTargetPath>
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</ItemGroup>
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<ItemGroup>
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<AssemblyAttribute Include="System.Runtime.CompilerServices.InternalsVisibleTo">
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<_Parameter1>Ryujinx.Tests</_Parameter1>
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</AssemblyAttribute>
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</ItemGroup>
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</Project>
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@ -1,5 +1,4 @@
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using ARMeilleure.IntermediateRepresentation;
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using System;
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using System.Numerics;
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namespace ARMeilleure.CodeGen.Arm64
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@ -32,9 +31,12 @@ namespace ARMeilleure.CodeGen.Arm64
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public static bool TryEncodeBitMask(Operand operand, out int immN, out int immS, out int immR)
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{
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ulong value = operand.Value;
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return TryEncodeBitMask(operand.Type, operand.Value, out immN, out immS, out immR);
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}
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if (operand.Type == OperandType.I32)
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public static bool TryEncodeBitMask(OperandType type, ulong value, out int immN, out int immS, out int immR)
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{
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if (type == OperandType.I32)
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{
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value |= value << 32;
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}
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@ -50,7 +52,7 @@ namespace ARMeilleure.CodeGen.Arm64
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// Any value AND all ones will be equal itself, so it's effectively a no-op.
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// Any value OR all ones will be equal all ones, so one can just use MOV.
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// Any value XOR all ones will be equal its inverse, so one can just use MVN.
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if (value == ulong.MaxValue)
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if (value == 0 || value == ulong.MaxValue)
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{
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immN = 0;
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immS = 0;
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@ -59,79 +61,18 @@ namespace ARMeilleure.CodeGen.Arm64
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return false;
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}
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int bitLength = CountSequence(value);
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// Normalize value, rotating it such that the LSB is 1: Ensures we get a complete element that has not
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// been cut-in-half across the word boundary.
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int rotation = BitOperations.TrailingZeroCount(value & (value + 1));
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ulong rotatedValue = ulong.RotateRight(value, rotation);
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if ((value >> bitLength) != 0)
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{
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bitLength += CountSequence(value >> bitLength);
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}
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// Now that we have a complete element in the LSB with the LSB = 1, determine size and number of ones
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// in element.
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int elementSize = BitOperations.TrailingZeroCount(rotatedValue & (rotatedValue + 1));
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int onesInElement = BitOperations.TrailingZeroCount(~rotatedValue);
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int bitLengthLog2 = BitOperations.Log2((uint)bitLength);
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int bitLengthPow2 = 1 << bitLengthLog2;
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if (bitLengthPow2 < bitLength)
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{
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bitLengthLog2++;
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bitLengthPow2 <<= 1;
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}
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int selectedESize = 64;
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int repetitions = 1;
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int onesCount = BitOperations.PopCount(value);
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if (bitLengthPow2 < 64 && (value >> bitLengthPow2) != 0)
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{
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for (int eSizeLog2 = bitLengthLog2; eSizeLog2 < 6; eSizeLog2++)
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{
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bool match = true;
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int eSize = 1 << eSizeLog2;
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ulong mask = (1UL << eSize) - 1;
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ulong eValue = value & mask;
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for (int e = 1; e < 64 / eSize; e++)
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{
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if (((value >> (e * eSize)) & mask) != eValue)
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{
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match = false;
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break;
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}
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}
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if (match)
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{
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selectedESize = eSize;
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repetitions = 64 / eSize;
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onesCount = BitOperations.PopCount(eValue);
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break;
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}
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}
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}
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// Find rotation. We have two cases, one where the highest bit is 0
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// and one where it is 1.
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// If it's 1, we just need to count the number of 1 bits on the MSB to find the right rotation.
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// If it's 0, we just need to count the number of 0 bits on the LSB to find the left rotation,
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// then we can convert it to the right rotation shift by subtracting the value from the element size.
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int rotation;
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long vHigh = (long)(value << (64 - selectedESize));
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if (vHigh < 0)
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{
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rotation = BitOperations.LeadingZeroCount(~(ulong)vHigh);
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}
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else
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{
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rotation = (selectedESize - BitOperations.TrailingZeroCount(value)) & (selectedESize - 1);
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}
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// Reconstruct value and see if it matches. If not, we can't encode.
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ulong reconstructed = onesCount == 64 ? ulong.MaxValue : RotateRight((1UL << onesCount) - 1, rotation, selectedESize);
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for (int bit = 32; bit >= selectedESize; bit >>= 1)
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{
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reconstructed |= reconstructed << bit;
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}
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if (reconstructed != value || onesCount == 0)
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// Check the value is repeating; also ensures element size is a power of two.
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if (ulong.RotateRight(value, elementSize) != value)
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{
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immN = 0;
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immS = 0;
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@ -140,34 +81,11 @@ namespace ARMeilleure.CodeGen.Arm64
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return false;
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}
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immR = rotation;
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// immN indicates that there are no repetitions.
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// The MSB of immS indicates the amount of repetitions, and the LSB the number of bits set.
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if (repetitions == 1)
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{
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immN = 1;
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immS = 0;
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}
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else
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{
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immN = 0;
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immS = (0xf80 >> BitOperations.Log2((uint)repetitions)) & 0x3f;
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}
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immS |= onesCount - 1;
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immN = (elementSize >> 6) & 1;
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immS = (((~elementSize + 1) << 1) | (onesInElement - 1)) & 0x3f;
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immR = (elementSize - rotation) & (elementSize - 1);
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return true;
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}
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private static int CountSequence(ulong value)
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{
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return BitOperations.TrailingZeroCount(value) + BitOperations.TrailingZeroCount(~value);
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}
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private static ulong RotateRight(ulong bits, int shift, int size)
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{
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return (bits >> shift) | ((bits << (size - shift)) & (size == 64 ? ulong.MaxValue : (1UL << size) - 1));
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}
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}
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}
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@ -1303,7 +1303,15 @@ namespace ARMeilleure.CodeGen.Arm64
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private static void GenerateConstantCopy(CodeGenContext context, Operand dest, ulong value)
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{
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if (value != 0)
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if (value == 0)
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{
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context.Assembler.Mov(dest, Register(ZrRegister, dest.Type));
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}
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else if (CodeGenCommon.TryEncodeBitMask(dest.Type, value, out _, out _, out _))
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{
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context.Assembler.Orr(dest, Register(ZrRegister, dest.Type), Const(dest.Type, (long)value));
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}
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else
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{
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int hw = 0;
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bool first = true;
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@ -1328,10 +1336,6 @@ namespace ARMeilleure.CodeGen.Arm64
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value >>= 16;
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}
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}
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else
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{
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context.Assembler.Mov(dest, Register(ZrRegister, dest.Type));
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}
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}
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private static void GenerateAtomicCas(
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@ -29,7 +29,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 4272; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 4328; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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46
Ryujinx.Tests/Cpu/Arm64CodeGenCommonTests.cs
Normal file
46
Ryujinx.Tests/Cpu/Arm64CodeGenCommonTests.cs
Normal file
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@ -0,0 +1,46 @@
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using ARMeilleure.CodeGen.Arm64;
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using NUnit.Framework;
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namespace Ryujinx.Tests.Cpu
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{
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public class Arm64CodeGenCommonTests
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{
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public struct TestCase
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{
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public ulong Value;
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public bool Valid;
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public int ImmN;
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public int ImmS;
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public int ImmR;
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}
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public static readonly TestCase[] TestCases =
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{
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new() { Value = 0, Valid = false, ImmN = 0, ImmS = 0, ImmR = 0 },
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new() { Value = 0x970977f35f848714, Valid = false, ImmN = 0, ImmS = 0, ImmR = 0 },
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new() { Value = 0xffffffffffffffff, Valid = false, ImmN = 0, ImmS = 0, ImmR = 0 },
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new() { Value = 0x5555555555555555, Valid = true, ImmN = 0, ImmS = 0x3c, ImmR = 0 },
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new() { Value = 0xaaaaaaaaaaaaaaaa, Valid = true, ImmN = 0, ImmS = 0x3c, ImmR = 1 },
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new() { Value = 0x6666666666666666, Valid = true, ImmN = 0, ImmS = 0x39, ImmR = 3 },
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new() { Value = 0x1c1c1c1c1c1c1c1c, Valid = true, ImmN = 0, ImmS = 0x32, ImmR = 6 },
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new() { Value = 0x0f0f0f0f0f0f0f0f, Valid = true, ImmN = 0, ImmS = 0x33, ImmR = 0 },
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new() { Value = 0xf1f1f1f1f1f1f1f1, Valid = true, ImmN = 0, ImmS = 0x34, ImmR = 4 },
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new() { Value = 0xe7e7e7e7e7e7e7e7, Valid = true, ImmN = 0, ImmS = 0x35, ImmR = 3 },
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new() { Value = 0xc001c001c001c001, Valid = true, ImmN = 0, ImmS = 0x22, ImmR = 2 },
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new() { Value = 0x0000038000000380, Valid = true, ImmN = 0, ImmS = 0x02, ImmR = 25 },
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new() { Value = 0xffff8fffffff8fff, Valid = true, ImmN = 0, ImmS = 0x1c, ImmR = 17 },
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new() { Value = 0x000000000ffff800, Valid = true, ImmN = 1, ImmS = 0x10, ImmR = 53 },
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};
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[Test]
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public void BitImmTests([ValueSource(nameof(TestCases))] TestCase test)
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{
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bool valid = CodeGenCommon.TryEncodeBitMask(test.Value, out int immN, out int immS, out int immR);
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Assert.That(valid, Is.EqualTo(test.Valid));
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Assert.That(immN, Is.EqualTo(test.ImmN));
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Assert.That(immS, Is.EqualTo(test.ImmS));
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Assert.That(immR, Is.EqualTo(test.ImmR));
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}
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}
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}
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