Mirrors/citra
1
0
Fork 0
mirror of https://github.com/PabloMK7/citra synced 2024-11-15 21:28:23 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

dyncom: Fix 32-bit ASR shifts for immediates

Browse source
This commit is contained in:
Lioncash 2015-01-12 14:12:05 -05:00
parent ac05c4acb0
commit f7770b83d4
1 changed files with 3 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View file

@ -176,13 +176,11 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i
unsigned int shifter_operand; unsigned int shifter_operand;
int shift_imm = BITS(sht_oper, 7, 11); int shift_imm = BITS(sht_oper, 7, 11);
if (shift_imm == 0) { if (shift_imm == 0) {
if (BIT(rm, 31)) { if (BIT(rm, 31) == 0)
shifter_operand = 0; shifter_operand = 0;
cpu->shifter_carry_out = BIT(rm, 31); else
} else {
shifter_operand = 0xFFFFFFFF; shifter_operand = 0xFFFFFFFF;
cpu->shifter_carry_out = BIT(rm, 31); cpu->shifter_carry_out = BIT(rm, 31);
}
} else { } else {
shifter_operand = static_cast<int>(rm) >> shift_imm; shifter_operand = static_cast<int>(rm) >> shift_imm;
cpu->shifter_carry_out = BIT(rm, shift_imm - 1); cpu->shifter_carry_out = BIT(rm, shift_imm - 1);